I. Field
The present disclosure relates generally to the field of graphics processing and, more specifically, to techniques for varying packing and linking in graphic systems.
II. Background
The public graphic standard OpenGL or OpenGL ES has a fixed functionality which can be altered in during per-vertex and per-pixel operations using vertex and fragment shaders. Vertex and fragment shaders have been developed to render special effects which have not been achieved with the default OpenGL functionality.
Referring now to FIG. 1, a general flowchart of the conventional pipeline stages in a graphics processing unit (GPU) with shaders is shown. There are three major pipeline stages: a vertex shader, denoted at block S10, primitive assembler and rasterizer, denoted at block S12, and a fragment shader, denoted at block S14. A further block S16 is provided for per-sample operations.
The vertex shader (VS) S10 is a program or computer program product executed for every vertex of a geometric object. The inputs of the VS S10 are called attributes, denoted at block A2. The VS S10 also accepts as inputs vertex uniforms VU2 which may include a number of vertex uniforms 0˜95 (i.e., 96 vertex uniforms). The outputs from the VS S10 and then the primitive assembler & rasterizer S12 are generally referred to as varyings, denoted at block V3, and are typically in a vertex cache (storing VS outputs) or other storage medium (storing rasterizer outputs). The varyings V3 may be values associated with pixels of triangles of a geometric object. The values associated with pixels are the results of the primitive assembler & rasterizer S12 computed based on the VS results associated with vertices of triangles of a geometric object. The VS results associated with the vertices and varyings V3 associated with pixels have the same names or IDs, types and ordering. The varyings V3 associated with pixels are inputs to the fragment shader (FS) S14. The FS S14 also accepts as inputs fragment uniforms FU3 which include generally a number (e.g., 16) of fragment uniforms.
FIG. 2 shows a general block diagram of the conventional pipeline stages with shaders. For a VS S10 inside a graphics processing unit (GPU), there are generally eight (8) attribute registers RA2 to store attributes 0˜7. There are generally eight output varying registers RV3A to store varyings 0˜7. The varying registers RV3A stores the VS outputs which is usually a vertex cache. There are generally eight output varying registers RV3B to store varyings 0˜7. The varying registers RV3B store rasterizer results corresponding to varyings associated with the pixels. The attribute registers RA2 and varying registers RV3A are input registers indexed with attributes 0˜7 and output varying registers RV3 indexed with varyings 0˜7, respectively. These register IDs are assigned by a compiler that compiles the vertex shader and fragment shader program from a high level language to a machine level language. The registers used in a shader program in a high level language are named by names instead of IDs/indexes. The register names are only viewable from the application developers. Applications access registers via register names. Register IDs are only viewable by the VS S10 or FS S14 in the GPU hardware (HW). Therefore, a symbol table will be created by the compiler, such as a VS input symbol table, output symbol table and FS input symbol table. However, the VS inputs or input symbol table have no relationship with outputs or an output symbol table in terms of contents, IDs and names.
The VS outputs or the output symbol table should match inputs or the input symbol table of the FS S14 in terms of contents and names, although the inputs or the input symbol table of the FS S14 may be a subset of outputs or the output symbol table of the VS S10.
The VS S10 also accepts as inputs the vertex uniforms VU2 stored in a storage medium as well as textures, denoted as T2, and temporary variables, denoted as TV2. The primitive assembler & rasterizer S12 receive the varyings in the output varying registers RV3A indexed with varyings 0˜7 and a parameter g1_Position P. The primitive assembler & rasterizer S12 output the varyings in the output varying registers RV3B indexed with varyings 0˜7 and the parameter g1_Position P. The FS S14 accepts as inputs the fragment uniforms FU3 stored in a storage medium as well as textures denoted as T3 and temporary variables denoted as TV3. The FS S14 receives the varyings in the output varying registers RV3B indexed with varyings 0˜7 and the parameter g1_Position denoted as P. The FS S14 also receives the additional parameters g1_Frontfacing denoted as FF, and g1_PointPosition, denoted as PP. The FS S14 outputs g1_FragColor FC. Attributes and varyings are also called shader variables.